UCIe Consortium publishes UCIe 4.0: chiplet memory link efficiency of about 94%, link power cut up to 80%
The specification adds UCIe.mem, which moves the memory controller from the compute SoC to a separate logic die, and extends die management. The consortium cites the figures for the inter-die link.
The UCIe Consortium published the UCIe 4.0 chiplet interconnect specification on 12 November 2026, according to xenospectrum.com. xenospectrum.com
xenospectrum.comxenospectrum.comOpen source ↗ The revision adds a specification for connecting a compute SoC to a memory logic die inside one package, so memory control can be separated from the compute side. Chiplets are small dies combined in a single package, and UCIe is the common standard for linking them.
UCIe.mem and link efficiency
The new UCIe.mem links a compute SoC and a memory logic die over UCIe-S or UCIe-A. The controller for HBM or LPDDR sits on the logic die, so the SoC no longer needs its own memory control circuitry. The existing physical layer, adapter, compliance evaluation and package infrastructure are reused.
The dies exchange memory requests and responses rather than low-level DRAM signals. A 16-byte slot in a 256-byte flit carries either 2 requests or 4 responses, which cuts header and acknowledgment overhead. For read-dominated traffic with 64-, 128- and 256-byte payloads, the consortium's technical description gives a transfer efficiency of about 94%; the upper limit in the announcement is 93.75%. UCIe.mem bandwidth density is about 2.5 TB/s/mm of die edge, which is not the effective memory bandwidth of a whole chip.
The 48/64 GT/s rate was introduced with UCIe 3.0. In 4.0 the UCIe-S bump layout for these rates was revised: bandwidth density per unit of die edge length rose by about 20% and per unit area by about 10%, and the die edge dimension was standardised at 1143 µm. xenospectrum.com
xenospectrum.comxenospectrum.comOpen source ↗ An optional co-optimisation profile for 64 GT/s requires a known partner die, compatible processes and shared power rails. The consortium states a 30–80% improvement in energy efficiency, and the technical description gives a 30–80% reduction in link power under set conditions; both refer to the die-to-die link, not to total system power.
Management, security and reset
The new TRoCs report each die's lifecycle, security state and test interface settings through the existing register access mechanism. A root of trust, also called the Security Director, verifies the reported state by cryptographic challenge-response. The management transport protocol gains bidirectional integrity protection, and key establishment follows NIST SP 800-56C.
Reset procedures are common across dies: Cold Reset returns a die to its power-on default, while Warm Reset can keep a vendor-defined state. The order in which dies are reset and the whole package is recovered is left to each manufacturer.
Event notifications now supplement polling. The delivery targets are under 1 µs for messages crossing one auxiliary-channel segment between adjacent dies and under 100 ns for priority events between physically adjacent dies; these are design targets, not measured values. xenospectrum.com
xenospectrum.comxenospectrum.comOpen source ↗ A dedicated one-way open-drain signal reports critical faults when normal links are unavailable, and an optional function measures eye margin during operation without stopping the link.
UCIe 4.0 remains backward compatible with all earlier versions. The announcement does not give product timing or volume production plans.
